An integrated circuit contains various semiconductor devices and a plurality of conducting metal paths that provide electrical power to the semiconductor devices and allow these semiconductor devices to share and exchange information. Within a semiconductor device, metal layers are stacked on top of one another using intermetal or interlayer dielectric layers that insulate the metal layers from each other. Metal layers typically occupy etched pathways in the interlayer dielectric. Normally, each metal layer must form an electrical contact to at least one additional metal layer or conductive layer. Such electrical contact is achieved by etching a hole in the interlayer dielectric that separates the metal layers or a metal layer and a doped substrate region, and filling the resulting via with a metal (plug) to create a vertical interconnect structure. A “via” normally refers to any micro-feature such as a hole, line or other similar feature formed within a dielectric layer that provides an electrical connection through the dielectric layer to a conductive layer underlying the dielectric layer. Similarly, micro-features containing metal layers connecting two or more vias are normally referred to as trenches.
The use of a low resistivity metal such as copper (Cu) provides significant gains in switching delay (RC-delay) and power consumption of integrated circuits. Bulk Cu is surrounded by barrier films that separate the bulk Cu from dielectric materials and other materials. Cu cannot be put in direct contact with dielectric materials since Cu has poor adhesion to the dielectric materials and Cu is known to easily diffuse into common integrated circuit materials such as silicon and dielectric materials where Cu is a mid-bandgap impurity. Furthermore, oxygen can diffuse from an oxygen-containing dielectric material into Cu, thereby decreasing the electrical conductivity of the Cu metal. Therefore, a diffusion barrier material is formed on dielectric materials and other materials in the semiconductor device to surround the Cu and prevent diffusion of the Cu into the semiconductor device materials.
However, common diffusion barrier material for Cu metallization have polycrystalline or columnar micro-structures with grain boundaries through which diffusion of oxygen, Cu, and Si can occur, thereby degrading or destroying the integrated circuit. Therefore, micro-structures of diffusion barrier materials need to be controlled to provide improved barrier properties for Cu metallization.